A semiconductor device which controls the supply of power to an internal circuit is known (see, for example, Japanese Laid-open Patent Publication No. 2009-246132). The logic circuit operates using power supplied from a first power line and a second power line. A switch turns ON and OFF of the supply of power from the first power line to the logic circuit. The semiconductor device includes a disconnectable power supplying device which is connected with the switch in parallel to supply power of the first power line to the logic circuit.
Further, a semiconductor device is known including a circuit block, a first switch provided between a first power line and a second power line which supplies a power supply voltage to the circuit block, and a second switch provided between the first power line and the second power line (see, for example, Japanese Laid-open Patent Publication No. 2012-194183). The first switch is turned ON in a test mode. The second switch is turned OFF in the test mode, and the operating state of the circuit block is turned ON/OFF in a normal operating mode according to turning ON/OFF of the second switch.
A related technique is disclosed in Japanese Laid-open Patent Publication No. 2009-246132 and Japanese Laid-open Patent Publication No. 2012-194183.
The disconnectable power supplying device is needed and thus, there is a problem of increase of area overhead to be solved in Japanese Laid-open Patent Publication No. 2009-246132. Further, a process of disconnecting the power supplying device is inevitably added after testing and thus, there is a problem of increase of cost to be solved. Further, there is a problem to be solved that a leak current increases due to the quality of disconnection of the power supplying device, causing increase of defective products.
Further, a first switch is needed in addition to a second switch and thus, there is a problem of increase of area overhead to be solved in Japanese Laid-open Patent Publication No. 2012-194183.
An object according to one aspect of the present disclosure is to provide a semiconductor device which may be tested while suppressing area overhead.